Switching power source devices of improved power factor have been employed in electronics such as office automation facilities and consumer appliances under harmonic current regulations (IEC/EN61000-3-2) and a guideline of harmonics control for household and general electric appliances. For example, U.S. Pat. No. 6,373,735 to Hiroshi Usui, discloses an AC-DC converter which comprises a MOS-FET, a boost circuit having a reactor connected in series to the MOS-FET to produce DC output voltage, and a control circuit for applying drive signals to a gate terminal of the MOS-FET to turn the MOS-FET on and off in order to accumulate and discharge energy in the reactor and produce higher DC output voltage from the reactor than AC voltage applied from AC power source.
FIG. 8 illustrates an example of prior art switching power source devices conforming to harmonic current regulations. The switching power source device of FIG. 8 comprises an AC power source 1; a diode bridge 2 as a rectifying circuit for converting AC input from AC power source 1 into DC power; a series circuit connected between positive and negative terminals of diode bridge 2, the series circuit including a main winding 31 of a boost reactor 3, a MOS-FET 4 as a switching element and a current detector 7 for detecting electric current flowing through the series circuit; a rectifying smoother 5 connected between a junction of main winding 31 of boost reactor 3 and MOS-FET 4 and negative terminal of diode bridge 2; a DC-DC converter 8 having a flyback converter circuit connected to an output side of rectifying smoother 5; an electric load 9 connected to an output side of DC-DC converter 8; and a control circuit 10 for controlling the on-off operation of MOS-FET 4. Rectifying smoother 5 comprises a rectifying diode 15 connected between a junction of main winding 31 of boost reactor 3 and MOS-FET 4 and negative terminal of diode bridge 2; and a smoothing capacitor 16 connected between rectifying diode 15 and negative terminal of diode bridge 2 to connect DC-DC converter 8 in parallel to smoothing capacitor 16. A power factor perfecting circuit is composed mainly of diode bridge 2 and boost reactor 3 to achieve the power factor improvement by performing the switching operation of MOS-FET 4 such that output voltage becomes constant, simultaneously forcing input current into boost chopper in boost reactor 3 to follow input voltage of sine waveform. DC-DC converter 8 connected to a subsequent stage of the power factor perfecting circuit serves to provide an electrically insulated desired output voltage.
Control circuit 10 comprises a pair of dividing resistors 21 and 22 for splitting output voltage from rectifying diode 15 into two voltages; a first normal power supply 25 for generating a first reference voltage; an error amplifier 26 for comparing voltage on a junction 29 between dividing resistors 21 and 22 with first reference voltage to produce an output; a capacitor 28 connected between output terminal of error amplifier 26 and ground; a pair of input dividing resistors 23 and 24 for parting output voltage from diode bridge 2; a multiplier 27 for producing an output of a value proportional to a product of voltage values on a junction 30 between dividing resistors 23 and on output terminal of error amplifier 26; a first comparator 36 for comparing voltage applied on a current detecting resistor 7 as a current detector with the output from multiplier 27 to produce an output when voltage from current detecting resistor 7 is higher than voltage from multiplier 27; an RS-flip flop (RSF/F) 37 as a changeover circuit which is set upon receiving an output from first comparator 36 to produce an output of high voltage level; a second power supply 34 for producing a second reference voltage; a second comparator 35 for comparing voltage induced on an auxiliary winding 32 of boost reactor 3 with second reference voltage to produce an output for resetting RSF/F 37; and a NOR gate 33 for producing an output to gate terminal of MOS-FET 4 when RSF/F 37 is reset. A shunted output of second comparator 35 is supplied directly to gate terminal of MOS-FET 4 through NOR gate 33 and drive resistor 38. The output value from multiplier 27 is set to a value proportional to a product of an instantaneous value from input voltage and error voltage from error amplifier 26. Terminal voltage from current detecting resistor 7 to non-inverted input terminal of first comparator 36 is similar or analogous to a waveform of electric current flowing through MOS-FET 4.
In operation, a drive signal is applied to gate terminal of MOS-FET 4 which is then turned on to start flowing of excitation current from AC power source 1 through diode bridge 2, main winding of boost reactor 3, MOS-FET 4 and current detecting resistor 7 to diode bridge 2 so that excitation current linearly increases to accumulate energy in boost reactor 3. At this point, rectified pulsating voltage is applied to main winding 31 of boost reactor 3 from diode bridge 2, and no current flows through rectifying diode 15 to which voltage in the adverse direction is applied.
Increasing excitation current flows through MOS-FET 4 and is detected by current detecting resistor 7 as a voltage of the level corresponding to the amount of excitation current to supply detected voltage to first comparator 36. Error amplifier 26 compares voltage on junction 29 between resistors 21 and 22 with first reference voltage of first power supply 25 to produce output when voltage on junction 29 is higher than first reference voltage. Multiplier 27 performs multiplication of input voltage from junction 30 and output from error amplifier 26 to give the product to first comparator 36 which compares output from current detecting resistor 7 with the product from multiplier 27. When excitation current increases so that output from current detecting resistor 7 is elevated above the output from multiplier 27, first comparator 36 produces the output of high voltage level to set RSF/F 37 which then issues the output to switch MOS-FET 4 from the on or conductive condition to the off or non-conductive condition.
Energy stored in boost reactor 3 during the on period of MOS-FET 4, causes electric current to flow through rectifying diode 15, smoothing capacitor 16 and DC-DC converter 8 to load 9 when MOS-FET 4 is turned off. At this moment, voltage polarity of auxiliary winding 32 in boost reactor 3 is inverted, and energy accumulated in boost reactor 3 increases and produces rising voltage on auxiliary winding 32. When voltage on auxiliary winding 32 becomes higher than second reference voltage of second power supply 34 applied on inverted input terminal of second comparator 35, it changes the output to high voltage level to reset RSF/F 37 and make MOS-FET 4 retain in the off condition through NOR gate 33 and drive resistor 38. MOS-FET 4 keeps its off condition until excitation current flowing through main winding 31 of boost reactor 3 comes to zero. When stored energy in boost reactor 3 is completely discharged, the voltage polarity in auxiliary winding 32 is inverted to cause second comparator 35 to change the output to the low voltage level so that MOS-FET 4 is turned on to resume a next switching cycle. In the switching power source device shown in FIG. 8, adjustment of the on-span of MOS-FET 4 can modulate energy amount accumulated in boost reactor 3. Also, power factor in the switching power source device can be improved by controlling excitation current running through MOS-FET 4 so as to approximate excitation current to similar figure in waveform of input sine waveform with the greatest possible accuracy, and at the same time, controlling the on-time of MOS-FET 4 so as to stabilize output voltage from rectifying smoother 5 to a constant level.
Input signal rectified through diode bridge 2 is branched by dividing resistors 23 and 24 into multiplier 27 as having the wave profile similar to fully rectified voltage waveform. On the other hand, error amplifier 26 produces the error signal or differential between DC output voltage separated by dividing resistors 21 and 22 and first reference voltage of first power supply 25, and output from error amplifier 26 is given to multiplier 27 which multiplies the output from error amplifier 26 by DC input voltage similar to rectified sine waveform to provide a command for setting an aimed value of electric current through MOS-FET 4. Accordingly, power factor can be improved by holding a critical or transitional performance or approximating electric current flowing through source and drain terminals of MOS-FET 4 from zero to peak voltage of AC power source 1 to similar figure in waveform of the aimed value of electric current sine waveform with the greatest possible accuracy so that electric current flowing through source and drain terminals of MOS-FET 4 is formed into a similar waveform to that of input sine wave voltage with the same phase.
In view of a fact that prior art switching power source device shown in FIG. 8 increases switching frequency of operating MOS-FET 4 during the light load period, elevated switching frequency may produce a disadvantageous delay in response of control circuit 10 or MOS-FET 4. If this is the case, control circuit 10 cannot shorten the drive signal for MOS-FET 4 to an optimal on-pulse width, thereby causing output voltage to undesirably rise and excessive voltage to appear on smoothing capacitor 16, expanding a risk of causing breakdown of the power source. Also, it has other drawbacks that increase in switching frequency during the light load period leads step-up in switching loss and amount of generated heat and big reduction in conversion efficiency of electric power. Moreover, drive resistor 38 connected between NOR gate 33 and gate terminal of MOS-FET 4 generates increased amount of heat, and therefore, unfavorably requires its large capacity in electric power.
Accordingly, an object of the present invention is to provide a switching power source device capable of controlling an undesirable rise in output voltage during the light load period.